Logic-timing Simulation And The Degradation Delay Model

Przednia okładka
This book provides the reader with an extensive background in the field of logic-timing simulation and delay modeling. It includes detailed information on the challenges of logic-timing simulation, applications, advantages and drawbacks. The capabilities of logic-timing are explored using the latest research results that are brought together from previously disseminated materials. An important part of the book is devoted to the description of the “Degradation Delay Model”, developed by the authors, showing how the inclusion of dynamic effects in the modeling of delays greatly improves the application cases and accuracy of logic-timing simulation. These ideas are supported by simulation results extracted from a wide range of practical applications.Sample Chapter(s)

Z wnętrza książki

Co mówią ludzie - Napisz recenzję

Nie znaleziono żadnych recenzji w standardowych lokalizacjach.

Wybrane strony

Spis treści

1 Fundamentals of Timing Simulation
1
Evolution and Trends
23
3 Degradation and Inertial Effects
47
4 CMOS Inverter Degradation Delay Model
75
5 GateLevel DDM
127
6 Logic Level Simulator Design and Implementation
181
7 DDM Simulation Results
203
8 Accurate Measurement of the Switching Activity
227
References
251
Index
265
Prawa autorskie

Inne wydania - Wyświetl wszystko

Kluczowe wyrazy i wyrażenia

Informacje bibliograficzne